1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a method for fabricating a semiconductor device suitable to a high speed and highly integrated device by lowering a resistance of a gate electrode.
2. Description of the Background Art
As a semiconductor device is highly integrated more and more, the length of a channel is rapidly shortened, which leads to a reduction in the width of a gate electrode. Accordingly, a polysilicon electrode typically used as a material for the gate electrode in the conventional art has a limitation in fabricating a high speed and highly integrated device.
Accordingly, the material for the existing gate electrode needs to be substituted by a fresh one having a low resistance.
Copper is spotlighted as a next generation metal line material since it has a low resistance and a favorable electron mobility characteristic. Nevertheless, due to its defective that it is hardly diffused into an insulation film, copper has never been used as a gate electrode.
Accordingly, the inventor of the present invention has studied in search for a method for fabricating a semiconductor device by using copper, having the low resistance and favorable electron mobility characteristic, as a gate electrode.
Therefore, an object of the present invention is to provide a method for fabricating a semiconductor device having a gate electrode suitable to a high speed and a highly integrated device.
Another object of the present invention is to provide a method for fabricating a semiconductor device of which a gate electrode is formed by using copper having a lower resistance and favorable electron mobility characteristic.
To achieve these and other advantages and in accordance with the purposed of the present invention, as embodied and broadly described herein, there is provided a method for fabricating a semiconductor device including the steps of: forming a gate insulation film on the upper surface of a semiconductor substrate; forming a dummy layer pattern on the upper surface of the gate insulation film; forming an insulating side wall spacer on both side walls of the dummy layer pattern; injecting an impurity ion into the semiconductor substrate of the both sides of the side wall spacer, to form a source and a drain; forming an insulation layer in a manner that the entire upper surface of the semiconductor substrate becomes higher than the dummy layer pattern; performing a chemical-mechanical polishing step, to expose the upper surface of the dummy layer pattern; etching the dummy layer pattern and forming a trench on the gate insulation film; forming a barrier film on the inner wall of the trench and on the upper surface of the insulation layer; and filling the trench with copper layer.
In order to achieve the above objects, the method for fabricating a semiconductor device further including a step of forming a polysilicon layer pattern between a gate insulation film and a dummy layer pattern.
In order to achieve the above objects, the method for fabricating a semiconductor device further including a step of forming a silicide layer on the upper surface of the source and the drain, after the step of forming the source and the drain.